1. Field of the Invention
[Technical Field to Which the Invention Belongs]
The present invention relates to a current adding type D/A converter equipped with a plurality of current cells made by employing constant current sources, and more specifically, is related to an improvement in a differential linearity error occurred in the D/A converter.
2. Description of the Related Art
As D/A converters capable of performing digital-to-analog converting operations, current adding D/A converters are widely used. As viewed from an aspect of conversion precision, in an ideal current adding type D/A converter, all of magnitudes of output currents derived from the respective current cells are made equal to each other. However, in an actual case, since transistor characteristics are fluctuated due to manufacturing process of the transistors, the magnitudes of the output currents derived from the respective current cells are not made constant. As a result, while differential linearity errors and also non-linear errors (integral linearity errors) will occur, these errors may depend upon the output current amounts of the respective current cells. In general, fluctuations contained in output current amounts are changed along a predetermined direction, depending upon an arrangement of current cells, namely, the fluctuations are increased, or decreased in a linear manner, depending upon the current cell arrangement. In other words, in a plurality of arrayed current cells, an output current characteristic defined from a current cell positioned at one end up to a current cell positioned at the other end is changed in the linear manner. For example, Japanese Laid-open Patent Application No. Hei-5-191289 discloses such an arrangement that the increase of the integral linearity errors may be suppressed by switching the respective current cells in the discrete manner.
Now, a structural example of a conventional current adding type D/A converter is represented. FIG. 9 is an explanatory diagram for showing an arranging structural example of current cells of the current adding type D/A converter. This example indicates such a case that a total number of current cells is equal to 16. FIG. 9(A) shows an array sequence of the current cells, and FIG. 9(B) represents a switching sequence of the current cells.
For instance, a current cell 501 through a current cell 516 are made of the same current cells. As indicated in this drawing, each of these current cells is constituted by employing a constant current source and a switch used to turn ON this constant current source. These current cells are arranged in the form of, for example, one column in this order of reference numerals 501 to 516. These reference numerals 501 to 516 correspond to array numbers of the current cells. Also, numerals [1] to [16] denoted on the respective current cells in FIG. 9(A) correspond to switching numbers, namely represent such a sequence that the current cells are switched. FIG. 9(B) shows current cells which are arranged by rearranging the above-described current cells of FIG. 9(A) in another switching order as shown in FIG. 9(B). Reference numerals denoted in the respective current cells show array numbers.
Now, a description will be made of operations of the current adding type D/A converter arranged in the above manner. In the current adding type D/A converter, when digital input data as a D/A conversion input is under no signal state (in this case, this signal state is assumed as xe2x80x9c0xe2x80x9d), all of the switches of the current cells are turned OFF. In the case that the input data is xe2x80x9c1xe2x80x9d, the switch of the current cell 509 is turned ON, so that a current is outputted from this current cell 509. When the input data is xe2x80x9c2xe2x80x9d, both the switches of the current cell 509 and the current cell 501 are turned ON, so that a current equal to two sets of these current cells are outputted. Furthermore, while the data is increased, in accordance with the sequence of the switching number, the current cell 510, the current cell 502, the current cell 511, the current cell 503, the current cell 512, the current cell 504, the current cell 513, the current cell 505, the current cell 514, the current cell 506, the current cell 515, the current cell 507, and the current cell 516 are sequentially turned ON, so that output currents from the current cells are added to each other. In such a case that the input data becomes 16, the current cell 508 is turned ON, so that since all of the 16 current cells are turned ON, the maximum current may flow.
As previously explained, in response to the value of the input data, the summation of the current amounts flowing from a plurality of current cells is controlled. This current is converted into a voltage by an output resistor, so that the D/A converting operation as to the input data is carried out. Thus, the analog output signal can be obtained with respect to the digital input data.
FIG. 10 is a graphic representation for representing a differential linearity error occurred in the case that the respective current cells are switched in the switching sequence shown in FIG. 9. In this graph, such differential linearity errors are indicated every output value when 1LSB is selected to be 1 in such a case that the output current amounts of the respective current cells are changed by 1% due to the cell arrangement. In FIG. 10, an ordinate indicates a magnitude of the differential linearity errors. An abscissa indicates a magnitude of total output current amounts (namely, total number of current cells which are turned ON and correspond to magnitude of input data). As indicated in this drawing, the differential linearity errors are made uniform over the entire output range.
As previously explained, in the conventional current adding type D/A converter, with respect to the fluctuations which are caused by the arrangement of the output current characteristics of the respective current cells, the entire differential linearity error can be made substantially uniform by switching the current cells in the discrete manner.
However, in the circuit arrangement of the conventional D/A converter, the precision with respect to the input data in the vicinity of the normally-used center point (namely, intermediate point between maximum value and minimum value) is made substantially identical to the precision with respect to the input data in the vicinity of both the maximum value and the minimum value, whose use frequency degrees are low. There is such a problem that the differential linearity errors occurred in the vicinity of the center point are large, especially, which may constitute the major factor of the D/A converter performance.
In a signal processing system equipped with a D/A converter, there are many cases that such signals (for instance, periodic signals such as audio signals) are employed, and these signals own positive amplitudes and negative amplitudes on the maximum side and the minimum side, while sandwiching a center point. In the case that the D/A converter is applied to such a signal processing system, the D/A converter requires higher precision while the signal has the smaller amplitude than that while the signal owns the large amplitude, as viewed from the SIN aspect and the distortion aspect. Such a consideration as to the characteristic while the signal owns the small amplitude is not made in this conventional current adding type D/A converter. Since the absolute value of the differential linearity errors occurred in the vicinity of the center point is large which corresponds to the signal having the small amplitude, the desirable performance of this D/A converter could not be obtained.
The present invention has been made to solve the above-explained problems, and therefore, has an object to provide such a current adding type D/A converter capable of improving characteristics thereof in the normally-used range such as while a signal has a small amplitude, which this D/A converter is capable of reducing differential linearity errors occurred in the vicinity of a center point of input data.
A current adding type D/A converter, according to a first aspect of the present invention, is featured by that in such a current adding type D/A converter having a plurality of current cells made by employing a plurality of constant current sources and a plurality of switches for turning ON the constant current sources, wherein: the current adding type D/A converter is comprised of switch control means; and wherein: in such a case that array numbers defined from xe2x80x9c1xe2x80x9d to xe2x80x9cnxe2x80x9d are applied to the plural current cells in the arranging order of the current cells, and the array number xe2x80x9cnxe2x80x9d is equal to the even number as well as xe2x80x9cn/2xe2x80x9d is equal to the even number, while combinations of the array numbers in which a summation of two array numbers becomes (n+1) are prepared within the plurality of current cells, an array of the array numbers is formed in such a manner that array numbers on the odd number side, or the even number side among the combinations of the current cells are arrayed from a smaller array number; and also the switch control means controls to turn ON the switches of the current cells in accordance with the array sequence, or another array sequence opposite to the array sequence.
A current adding type D/A converter, according to a second aspect of the present invention, is featured by that in such a current adding type D/A converter having a plurality of current cells made by employing a plurality of constant current sources and a plurality of switches for turning ON the constant current sources, wherein: the current adding type D/A converter is comprised of switch control means; and wherein: in such a case that array numbers defined from xe2x80x9c1xe2x80x9d to xe2x80x9cnxe2x80x9d are applied to the plural current cells in the arranging order of the current cells, and the array number xe2x80x9cnxe2x80x9d is equal to the even number as well as xe2x80x9cn/2xe2x80x9d is equal to the odd number, while combinations of the array numbers in which a summation of two array numbers becomes (n+1) except for both the array number xe2x80x9c1xe2x80x9d and the array number xe2x80x9cnxe2x80x9d are prepared within the plurality of current cells, and further, the array number xe2x80x9c1xe2x80x9d is set as either a top number or a last number, an array of the array numbers is formed in such a manner that array numbers on the odd number side, or the even number side among the combinations of the current cells are arrayed from a smaller array number and the array number xe2x80x9cnxe2x80x9d is arrayed as either the last number or the top number; and also the switch control means controls to turn ON the switches of the current cells in accordance with the array sequence, or another array sequence opposite to the array sequence.
A current adding type D/A converter, according to a third aspect of the present invention, is featured by that in such a current adding type D/A converter having a plurality of current cells made by employing a plurality of constant current sources and a plurality of switches for turning ON the constant current sources, wherein: the current adding type D/A converter is comprised of switch control means; and wherein: in such a case that array numbers defined from xe2x80x9c1xe2x80x9d to xe2x80x9cnxe2x80x9d are applied to the plural current cells in the arranging order of the current cells, and the array number xe2x80x9cnxe2x80x9d is equal to the odd number as well as xe2x80x9c(n+1)/2xe2x80x9d is equal to the odd number, while combinations of the array numbers in which a summation of two array numbers becomes (n+1) except for the array number xe2x80x9c(n+1)/2xe2x80x9d are prepared within the plurality of current cells, an array of the array numbers is formed in such a manner that array numbers on the odd number side, or the even number side among the combinations of the current cells are arrayed from a smaller array number so as to form such an array that the array number (n+1)/2 is set at an (n+1)/2-th order; and also the switch control means controls to turn ON the switches of the current cells in accordance with the array sequence, or another array sequence opposite to the array sequence.
A current adding type D/A converter, according to a fourth aspect of the present invention, is featured by that in such a current adding type D/A converter having a plurality of current cells made by employing a plurality of constant current sources and a plurality of switches for turning ON the constant current sources, wherein: the current adding type D/A converter is comprised of switch control means; and wherein: in such a case that array numbers defined from xe2x80x9c1xe2x80x9d to xe2x80x9cnxe2x80x9d are applied to the plural current cells in the arranging order of the current cells, and the array number xe2x80x9cnxe2x80x9d is equal to the odd number as well as xe2x80x9c(n+1)/2xe2x80x9d is equal to the even number, while combinations of the array numbers in which a summation of two array numbers becomes (n+1) except for the array number xe2x80x9c1xe2x80x9d, the array number xe2x80x9cnxe2x80x9d and the array number xe2x80x9c(n+1)/2xe2x80x9d are prepared within the plurality of current cells, and further, the array number xe2x80x9c1xe2x80x9d is set as either a top number or a last number, an array of the array numbers is formed in such a manner that array numbers on the odd number side, or the even number side among the combinations of the current cells are arrayed from a smaller array number and the array number xe2x80x9cnxe2x80x9d is arrayed as either the last number or the top number while the array number xe2x80x9c(n+1)/2xe2x80x9d is set at an (n+1)/2-th order; and also the switch control means controls to turn ON the switches of the current cells in accordance with the array sequence, or another array sequence opposite to the array sequence.
A current adding type D/A converter, according to a fifth aspect of the present invention, is featured by that in the combinations of the current cells in which the summation of the two array numbers becomes (n+1), the combinations are arrayed by mutually and arbitrarily rearranging the sequences thereof.
A current adding type D/A converter, according to a sixth aspect of the present invention, is featured by that in the case that the array number xe2x80x9cnxe2x80x9d is equal to the even number, the array of said current cells is divided by a power of xe2x80x9c2xe2x80x9d to obtain current cell groups, and the current cell groups which are located in symmetrical positions with respect to a center point of the array are arrayed by arbitrarily rearranging the sequences of the current cells in a symmetrical manner with respect to the center point.
A current adding type D/A converter, according to a seventh aspect of the present invention, is featured by that in the case that the array number xe2x80x9cnxe2x80x9d is equal to the odd number, the array of the current cells is divided by a power of xe2x80x9c2xe2x80x9d except for the array number xe2x80x9c(n+1)/2xe2x80x9d to obtain current cell groups, and the current cell groups which are located in symmetrical positions with respect to a center point of the array are arrayed by arbitrarily rearranging the sequences of the current cells in a symmetrical manner with respect to the center point.
In the above-explained arrangement, based upon the array set by the switch control means, the switching operation of the current cells is carried out as follows: That is, the switching sequence is determined in such a manner that the current cells having the large fluctuations of the output currents (namely, located on both sides) are turned ON in the order corresponding to such a value nearly equal to either the maximum value or the minimum value of the input data, whereas the current cells having the small fluctuations (located in the vicinity of center point) are turned ON in the order of such a value near the center point. As a result, even in such a case that the fluctuations of the output current amounts are changed along the predetermined direction by the arrangement of the current cells which are caused by the process fluctuations of the D/A converter, the difference in the output current amounts between the current cells becomes small, which are turned ON before/after near the center point of the input data (intermediate between maximum value and minimum value). Also, the fluctuations of the output current amounts among the current cells whose switching sequences are close to each other can be made constant.
In a general-purpose signal processing system, for example, such a signal (periodic signal such as audio signal) having a positive amplitude and a negative amplitude on the maximum value side and also on the minimum value side is employed while sandwiching a center point. The highest appearing frequency degree corresponds to the range in the vicinity of the center point of the input data. This range may correspond to such a normally-used range in which most of input data are concentrated. As a consequence, in accordance with the present invention, the precision of the D/A converter can be improved in the vicinity of the center point corresponding to the normally-used range in the general-purpose signal processing system, and also the distortions as as the noise contained in the output signal can be decreased.